The present invention relates in general to semiconductor interconnects and, more particularly, to stacked interconnecting substrates with minimal interconnect lengths.
Integrated circuits (IC) typically use multiple layers of metal within the chip to perform interconnections between active elements. The metal interconnects route signals around the chip as necessary to achieve the intended function. As integrated circuits become smaller and more dense, the lines interconnecting active elements become narrower and more closely packed together. Therefore, the resistance of each interconnect line increases as cross-sectional area decreases. Likewise, the capacitance between adjacent interconnect lines increases with less spacing between the lines. The interconnect lines should be kept as short as possible to reduce propagation delay. Thus, increasing density can spawn slower operating speeds because of the interconnect requirements. Another problem occurs during electromigration where high temperatures and high current density create voids in the metal and eventually open-circuits the interconnect lines.
Prior art solutions have considered low dielectric insulators and higher conductivity metals for higher density ICs. Nonetheless, VLSI designs continue to struggle with speed vs. density trade-offs. With each additional metal layer to handle the large number of functional active circuit elements, more masking steps are necessary which adds expense and complexity to the IC.
In many applications such as supercomputers, the need to pack many functions into dense packages while maintaining high operating speed has lead designers to consider using two-sided substrates with semiconductor devices on both sides of the integrated circuit wafer to make maximum use of available space and achieve the necessary functionality. The two-sided substrate tends to increase channel routing length in order to interconnect circuits on opposite sides of the substrate. Yet, the aforedescribed physical electrical behavior of the routing channels favor using very short connections to reduce propagation delay and maintain high operating speed.
Hence, a need exists to minimize signal routing and propagation delay between two surfaces of a substrate.